1. Field of the Invention
The present invention pertains to an improved method for forming a multi-layered aluminum-comprising structure on a substrate having a patterned dielectric surface. In particular, the present invention pertains to a method for performing second layer metallization of multi-layered semiconductor structures using a single-step, high temperature aluminum metallization method, without need for deposition of a nucleation layer of aluminum.
2. Brief Description of the Background Art
Aluminum multilayer metallization technology is used to deposit aluminum plugs which make contacts between metallization layers or levels and to deposit interconnect lines between contacts on a given layer or level. In the past, aluminum metallization of both contacts and interconnects was achieved by one of two methods: reflow or multistep deposition. In the reflow method, aluminum is deposited onto the wafer in a standard aluminum chamber. The wafer is subsequently transferred into an aluminum reflow chamber, where the wafer is heated to temperatures within the range of approximately 500.degree. C. to supply the aluminum with sufficient energy to reflow and thus to create a void-free contact or via.
Using the multi-step deposition method, a wetting layer is first deposited, followed by deposition of a nucleation layer of aluminum at a low temperature, ranging from about 25.degree. C. to about 150.degree. C. The wafer is then heated to 430-480.degree. C. and aluminum is deposited over the nucleation layer to fill the contact or via. The nucleation layer and the fill layer of aluminum can be deposited in a two-chamber configuration (one chamber operated over the 25.degree. C. to 150.degree. C. temperature range, followed by a second chamber, operated over the 430-480.degree. C. temperature range). In the alternative, a single chamber configuration can be used, where the nucleation layer is deposited without the application of heat to the backside of the wafer, and then the fill step is performed with the application of heat to the backside of the wafer.
Examples of prior art aluminum deposition methods are described below:
U.S. Pat. No. 4,816,126, issued Mar. 28, 1989 to Kamoshida et al., discloses a method for forming a planarized aluminum or aluminum alloy film wherein charged particles are irradiated over a thin film formed or being formed on a convex and concave surface of a substrate. During the irradiation, a rise in temperature of the thin film and impingement of charged particles cause the fluidization of the thin film, so that a planarized thin film is formed in a short period of time.
U.S. Pat. No. 5,108,570, issued Apr. 28, 1992 to Wang, and assigned to the assignee of the present invention, discloses a multi-step aluminum sputtering process. The first step of the process comprises sputtering from about 200 to about 2000 .ANG. of aluminum while the wafer temperature is within a range of from about 50.degree. C. to about 250.degree. C., and the sputtering plasma is at a power of from about 1 to about 16 kW. The power level range is then changed to from about 14 to about 20 kW, a DC or AC bias is applied to the wafer, and aluminum is sputtered either for an additional time period of about 20 to about 40 seconds, or until the wafer temperature reaches 500.degree. C., whichever occurs first. Then, the back side of the wafer is contacted by a thermally conductive gas to control the wafer temperature while further aluminum is optionally sputtered onto the wafer for an additional 0 to 45 seconds.
U.S. Pat. No. 5,171,412, issued Dec. 15, 1992 to Talieh et al., and assigned to the assignee of the present invention, discloses a material deposition method comprising a first, low temperature deposition step, followed by a second, high temperature/high power deposition step. In the first deposition step, a collimation plate is placed between the sputtering target and the substrate, such that a collimated stream of sputtered material is deposited upon the substrate. The collimated stream provides a seed layer which aids in eliminating voids by partially filling the holes and grooves in the surface of the substrate. The second deposition step is conducted as a high temperature sputtering deposition. At the high temperature, the sputtered material joins and flows with the seed layer, whereby the holes and grooves are more easily filled without voids, and an improved planarized layer is achieved.
U.S. Pat. No. 5,330,628, issued Jul. 19, 1994 to Demaray et al., discloses a method of depositing a step coating on a workpiece, comprising the steps of (i) preheating the workpiece to a first elevated temperature, (ii) depositing an initial coating on the workpiece by sputtering at a first rate for a first predetermined period of time, (iii) sputtering at a second rate for a second predetermined period of time, which is longer in duration than the first predetermined period of time, and the second rate of sputtering being slower than the first rate, (iv) increasing the temperature of the workpiece to a second temperature, which is higher than the first temperature, and (v) depositing an additional coating on the workpiece while the temperature of the workpiece is being increased.
U.S. Pat. No. 5,371,042, issued Dec. 6, 1994 to Ong, and assigned to the assignee of the present invention, discloses a method of filling vias and openings in semiconductor devices. The method comprises the steps of (i) faceting the tops of the openings, (ii) depositing a barrier layer (e.g., titanium nitride), (iii) treating the barrier layer to reduce its porosity, (iv) depositing a titanium-containing wetting layer, (v) sputter depositing a first layer of aluminum at low temperatures, and (vi) sputter depositing a second layer of aluminum at high temperatures to fill the opening and planarize the layer.
Commonly assigned, copending U.S. application Ser. No. 08/511,825, to Xu et al., filed Aug. 7, 1995, discloses a method of forming an electrical contact having an aspect ratio greater than 1:1 in a multi-layered integrated circuit. The method includes the following steps: (a) depositing at least one layer of material (a portion of which is a refractory metal and a portion of which is a refractory metal compound) over the surface of an opening (i.e., a through-hole) through which an electrical contact is to pass; and (b) depositing at least one layer of a conductive sputtered material over the surface of the layer which includes the refractory metal, until-the through-hole is filled with the conductive material. The step of filling the opening with conductive material includes the steps of depositing the conductive material layer at a temperature below about 150.degree. C. to form a seed (ie., nucleation) layer, and then continuing to deposit the conductive material layer while maintaining the substrate at a "reflow" temperature (i.e., between about 35.degree. C. to 40.degree. C.).
A method for performing void-free metallization of multi-layered semiconductor structures using a single-step, aluminum metallization method, without need for deposition of a nucleation layer of aluminum or for a reflow step to fill voids created during metallization, would be highly advantageous. It would also be desirable to provide a rapid, efficient, aluminum metallization method which can be performed within a single processing chamber.